Research Highlights: Research Group from Taiwan Reports 2.4 Fold Increase in External Quantum Efficiency for Nano-patterned LED
Sep 7, 2011 Semiconductor today has highlighted a recent research advance published by the scientists from National Tsing Hua University and National Applied Research Laboratories, Taiwan (Yu-Sheng Lin and J. Andrew Yeh, Appl. Phys. Express, vol4, p092103, 2011). The novel sapphire nanopatterning technique allows increase of external quantum efficiencies (EQE) of nitride semiconductor LEDs by 2.4x over devices grown on conventional sapphire at 20mA drive current.
Mike Cooke, the technology journalist from Semiconductor Today, brings to everyone attention several important factors that affect LED efficiency:
" First, the nanopatterned surface affects the growth process, reducing the number of dislocations in the nitride semiconductor crystal; such dislocations can degrade LED performance. Second, the growth process often creates air-voids at the interface between the sapphire and nitride semiconductor heterostructure; the voids can be used to alter the way the light generated by the LED action leaves the device. Sometimes both effects operate to improve EQEs of nitride LEDs.
The Taiwan researchers used a random nanopatterning that they called ‘void-embedded cortex-like nanostructures’ (VECN). The team sees their method as being “a cost-effective solution to the wafer-level cortex-like nanostructures on sapphire for high-efficiency LEDs without implementation of an expensive semiconductor mask”.
The nanopatterning of the sapphire wafer surface was achieved by creating a 2μm-thick hard mask of polysilicon and performing an inductively coupled plasma reactive-ion etch with a boron tetrachloride and chlorine mix. The deposition of the polysilicon was through 640°C low-pressure chemical vapor deposition. The patterning for the hard mask was created by dipping the polysilicon-covered wafer in diluted Wright-etch solution for 30 minutes. Wright-etch solution is an acid mix developed in the 1970s to reveal defects in silicon crystal structures. The hard mask was removed by potassium hydroxide solution at 80°C. The resulting patterning of the sapphire wafer surface consisted of 1010/cm2 80–150nm deep structures spaced 50–150nm apart.
For full details and analysis by Mike Cooke at Semiconductor Today please refer to: http://www.semiconductor-today.com/news_items/2011/SEPT/NTHU_070911.html
Author: Alice Jones
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